职位描述
1. 逻辑设计及其验证
2. 前端ASIC流程：综合，扫描链插入，形式验证，内存自测电路，静态时序分析等
3. 与其他部门一起完成芯片整个量产相关过程
职位要求
1. 电子工程类本科，0-3年数字IC设计经验；最好具有硕士学位
2. 有Verilog设计、仿真及调试经验
3. 熟悉职位描述中所提各流程相应的EDA工具
4. 具有C/C++, Perl, 和TCL编程经验
5. 熟悉图像/音频信号处理
6. 良好的中英文沟通能力
Digital IC Design Engineer
Job Description
1. Logic design and design validation
2. Front-end ASIC flow such as synthesis, scan insertion, formal verification, MBIST, static timing analysis
3. Work together with other teams to complete a project from chip specification to mass production
Job Requirement
1. Bachelor degree in EE or relative major with 0-3 years experience in digital IC design and verification is a must, Master degree is preferred
2. Experience on Verilog RTL design, simulation, and debug
3. Familiar with the relative EDA tools for the above ASIC flow
4. C/C++, Perl, and TCL programming skills are a plus
5. Familiar with image/audio signal processing is a plus
6. Good communication skills in both Chinese and English